Implementing branch-predictor decay using quasi-static memory cells
نویسندگان
چکیده
منابع مشابه
Implementing Decay Techniques using Quasi-Static Memory Cells
This paper proposes the use of four-transistor (4T) cache and branch predictor array cell designs to address increasing worries regarding leakage power dissipation. While 4T designs lose state when infrequently accessed, they have very low leakage, smaller area, and no capacitive loads to switch. This short paper gives an overview of 4T implementation issues and a preliminary evaluation of leak...
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ژورنال
عنوان ژورنال: ACM Transactions on Architecture and Code Optimization
سال: 2004
ISSN: 1544-3566,1544-3973
DOI: 10.1145/1011528.1011531